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1 ltc3406-1.2 340612fa high efficiency: up to 90% very low quiescent current: only 20 a 600ma output current at v in = 3v 2.5v to 5.5v input voltage range 1.5mhz constant frequency operation no schottky diode required shutdown mode draws < 1 a supply current current mode operation for excellent line and load transient response overtemperature protected low profile (1mm) thinsot tm package the ltc 3406-1.2 is a high efficiency monolithic syn- chronous buck regulator using a constant frequency, current mode architecture. supply current during opera- tion with only 20 a drops <1 a in shutdown. the 2.5v to 5.5v input voltage range makes the ltc3406-1.2 ideally suited for single li-ion battery-powered applications. 100% duty cycle provides low dropout operation, extending battery life in portable systems. automatic burst mode operation further increases efficiency at light loads. switching frequency is internally set at 1.5mhz, allowing the use of small surface mount inductors and capacitors. the internal synchronous switch increases efficiency and eliminates the need for an external schottky diode. the ltc3406-1.2 is available in a low profile (1mm) thinsot package. cellular telephones personal information appliances wireless and dsl modems digital still cameras mp3 players portable instruments high efficiency step-down converter 1.5mhz, 600ma synchronous step-down regulator in thinsot efficiency and power loss features descriptio u applicatio s u typical applicatio u v in c in 4.7 f cer v in 2.7v to 5.5v ltc3406-1.2 run 2.2 h 340612 ta 01a sw v out gnd c out 10 f cer v out 1.2v 600ma load current (ma) 0.1 10 1000 100 90 80 70 60 50 40 30 20 10 0 340612 ta01b 1 100 1 0.1 0.01 0.001 0.00001 0.0001 v in = 2.7v v in = 3.6v v in = 4.2v efficiency power loss power loss (w) efficiency (%) , ltc and lt are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. thinsot is a trademark of linear technology corporation. protected by u.s. patents including 5481178, 6580258, 6304066, 6127815, 6498466, 6611131.
2 ltc3406-1.2 340612fa symbol parameter conditions min typ max units v out regulated output voltage i out = 100ma 1.164 1.2 1.236 v ? v ovl output overvoltage lockout ? v ovl = v ovl ?v out 2.5 6.25 10 % ? v out output voltage line regulation v in = 2.5v to 5.5v 0.04 0.4 %/v i pk peak inductor current v in = 3v, v out = 1.08v, duty cycle < 35% 0.75 1 1.25 a v loadreg output voltage load regulation 0.5 % v in input voltage range 2.5 5.5 v i s input dc bias current (note 4) active mode v out = 1.08v, i load = 0a 300 400 a sleep mode v out = 1.236v, i load = 0a 20 35 a shutdown v run = 0v, v in = 5.5v 0.1 1 a f osc oscillator frequency v out = 1.2v 1.2 1.5 1.8 mhz v out = 0v 210 khz r pfet r ds(on) of p-channel fet i sw = 100ma 0.4 0.5 ? r nfet r ds(on) of n-channel fet i sw = 100ma 0.35 0.45 ? i lsw sw leakage v run = 0v, v sw = 0v or 5v, v in = 5v 0.01 1 a v run run threshold 0.3 1 1.5 v i run run leakage current 0.01 1 a input supply voltage .................................. 0.3v to 6v run, v out voltages................................... 0.3v to v in sw voltage (dc) ......................... 0.3v to (v in + 0.3v) p-channel switch source current (dc) ............. 800ma n-channel switch sink current (dc) ................. 800ma peak sw sink and source current (v in = 3v)........ 1.3a operating temperature range (note 2) .. 40 c to 85 c junction temperature (notes 3, 5) ...................... 125 c storage temperature range ................ 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c absolute axi u rati gs w ww u package/order i for atio uu w (note 1) the denotes specifications which apply over the full operating temperature range, otherwise specifications are t a = 25 c. v in = 3.6v unless otherwise specified. electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: the ltc3406e-1.2 is guaranteed to meet performance specifications from 0 c to 70 c. specifications over the ?0 c to 85 c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: t j is calculated from the ambient temperature t a and power dissipation p d according to the following formula: ltc3406-1.2: t j = t a + (p d )(250 c/w) note 4: dynamic supply current is higher due to the gate charge being delivered at the switching frequency. note 5: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125 c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. ltc3406es5-1.2 ltbmq t jmax = 125 c, ja = 250 c/ w, jc = 90 c/ w run 1 gnd 2 top view s5 package 5-lead plastic tsot-23 sw 3 5 v out 4 v in order part number s5 part marking consult ltc marketing for parts specified with wider operating temperature ranges. order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/
3 ltc3406-1.2 340612fa typical perfor a ce characteristics uw efficiency vs input voltage efficiency and power loss reference voltage vs temperature oscillator frequency vs temperature (from figure 1) temperature ( c) ?0 reference voltage (v) 1.178 1.188 1.198 1.208 1.218 1.228 1.168 25 75 ?5 0 50 100 125 v in = 3.6v 340612 g03 temperature ( c) ?0 frequency (mhz) 1.70 1.65 1.60 1.55 1.50 1.45 1.40 1.35 1.30 25 75 ?5 0 50 100 125 v in = 3.6v 340612 g04 input voltage (v) 2 efficiency (%) 6 340612 g01 3 4 5 100 95 90 85 80 75 70 i out = 600ma i out = 100ma i out = 10ma i load (ma) 0.1 efficiency (%) 10 1000 100 90 80 70 60 50 40 340612 go2 1 100 v in = 2.7v v in = 3.6v v in = 4.2v load current (ma) 0 output voltage (v) 500 200 300 400 600 800 100 1.225 1.215 1.205 1.195 1.185 1.175 340612 g06 1000 900 700 oscillator frequency vs supply voltage output voltage vs load current supply voltage (v) 2 oscillator frequency (mhz) 1.8 1.7 1.6 1.5 1.4 1.3 1.2 34 56 340612 g05 t a = 25 c temperature ( c) ?0 0.4 0.5 0.7 25 75 340612 g08 0.3 0.2 ?5 0 50 100 125 0.1 0 0.6 r ds(on) ( ? ) main switch synchronous switch v in = 2.7v v in = 3.6v v in = 4.2v supply voltage (v) 2 0 supply current ( a) 5 15 20 25 50 35 3 4 340612 g09 10 40 45 30 5 6 i load = 0a r ds(on) vs input voltage input voltage (v) 1 0 0.4 0.5 0.7 46 340612 g07 0.3 0.2 23 57 0.1 0 0.6 r ds(on) ( ? ) main switch synchronous switch t a = 25 c r ds(on) vs temperature supply current vs supply voltage t a = 25 c unless otherwise specified.
4 ltc3406-1.2 340612fa load step v out 100mv/div ac coupled i l 500ma/div i load 500ma/div 20 s/div v in = 3.6v i load = 25ma to 600ma 340612 g15 load step run 2v/div v out 1v/div i l 500ma/div 40 s/div v in = 3.6v i load = 100ma to 600ma 340612 g14 input voltage (v) 0 0 switch leakage (pa) 20 40 60 80 120 1 234 340612 g12 56 100 run = 0v t a = 25 c synchronous switch main switch temperature ( c) ?0 0 supply current ( a) 5 15 20 25 50 35 0 50 75 340612 g10 10 40 45 30 ?5 25 100 125 v in = 3.6v i load = 0a typical perfor a ce characteristics uw (from figure 1) supply current vs temperature switch leakage vs input voltage (from figure 1a except for the resistive divider resistor values) sw 2v/div v out 50mv/div ac coupled i l 200ma/div 4 s/div v in = 3.6v i load = 25ma 3406b12 g13 discontinuous operation temperature ( c) ?0 switch leakage (na) 200 250 300 25 75 340612 g11 150 100 ?5 0 50 100 125 50 0 v in = 5.5v run = 0v main switch synchronous switch switch leakage vs temperature
5 ltc3406-1.2 340612fa uu u pi fu ctio s run (pin 1): run control input. forcing this pin above 1.5v enables the part. forcing this pin below 0.3v shuts down the device. in shutdown, all functions are disabled drawing <1 a supply current. do not leave run floating. gnd (pin 2): ground pin. sw (pin 3): switch node connection to inductor. this pin connects to the drains of the internal main and synchro- nous power mosfet switches. v in (pin 4): main supply pin. must be closely decoupled to gnd, pin 2, with a 2.2 f or greater ceramic capacitor. v out (pin 5): output voltage feedback pin. an internal resistive divider divides the output voltage down for com- parison to the internal reference voltage. fu ctio al diagra u u w + + ea + i rcmp + i comp 5 1 run osc slope comp osc freq shift 0.8v 0.65v fb 0.8v + ? v ovl 60k 120k 0.8v ref shutdown v in v out v in s r rs latch ov switching logic and blanking circuit anti- shoot- thru q q 5 ? 4 sw 3 gnd 3406b12 bd 2 + ovdet v out 100mv/div ac coupled i load 500ma/div i l 500ma/div 20 s/div v in = 3.6v i load = 100ma to 600ma 340612 g16 v out 100mv/div ac coupled i l 500ma/div i load 500ma/div 20 s/div v in = 3.6v i load = 200ma to 600ma 340612 g17 load step load step typical perfor a ce characteristics uw (from figure 1a except for the resistive divider resistor values)
6 ltc3406-1.2 340612fa operatio u (refer to functional diagram) main control loop the ltc3406-1.2 uses a constant frequency, current mode step-down architecture. both the main (p-channel mosfet) and synchronous (n-channel mosfet) switches are internal. during normal operation, the internal top power mosfet is turned on each cycle when the oscillator sets the rs latch, and turned off when the current com- parator, i comp , resets the rs latch. the peak inductor current at which i comp resets the rs latch, is controlled by the output of error amplifier ea. when the load current increases, it causes a slight decrease in the feedback voltage, fb, relative to the 0.8v reference, which in turn causes the ea amplifier? output voltage to increase until the average inductor current matches the new load cur- rent. while the top mosfet is off, the bottom mosfet is turned on until either the inductor current starts to reverse, as indicated by the current reversal comparator i rcmp , or the beginning of the next clock cycle. the comparator ovdet guards against transient overshoots >6.25% by turning the main switch off and keeping it off until the fault is removed. burst mode operation the ltc3406-1.2 is capable of burst mode operation in which the internal power mosfets operate intermittently based on load demand. in burst mode operation, the peak current of the inductor is set to approximately 200ma regardless of the output load. each burst event can last from a few cycles at light loads to almost continuously cycling with short sleep intervals at moderate loads. in between these burst events, the power mosfets and any unneeded circuitry are turned off, reducing the quiescent current to 20 a. in this sleep state, the load current is being supplied solely from the output capacitor. as the output voltage droops, the ea amplifier? output rises above the sleep threshold signal- ing the burst comparator to trip and turn the top mosfet on. this process repeats at a rate that is dependent on the load demand. short-circuit protection when the output is shorted to ground, the frequency of the oscillator is reduced to about 210khz, 1/7 the nominal frequency. this frequency foldback ensures that the in- ductor current has more time to decay, thereby preventing runaway. the oscillator? frequency will progressively increase to 1.5mhz when v out rises above 0v. figure 1. typical application v in c in ** 4.7 f cer v in 2.7v to 5.5v * ** ? ltc3406-1.2 run 3 2.2 h* 340612 f01 murata lqh3c2r2m24 taiyo yuden jmk212bj475mg taiyo yuden jmk316bj106ml 5 4 1 2 sw v out gnd c out ? 10 f cer v out 1.2v 600ma
7 ltc3406-1.2 340612fa applicatio s i for atio wu uu the basic ltc3406-1.2 application circuit is shown in figure 1. external component selection is driven by the load requirement and begins with the selection of l fol- lowed by c in and c out . inductor selection for most applications, the value of the inductor will fall in the range of 1 h to 4.7 h. its value is chosen based on the desired ripple current. large value inductors lower ripple current and small value inductors result in higher ripple currents. higher v in or v out also increases the ripple current as shown in equation 1. a reasonable starting point for setting ripple current is ? i l = 240ma (40% of 600ma). ? = ()( ) ? ? ? ? ? ? ? i fl v v v l out out in 1 1 (1) the dc current rating of the inductor should be at least equal to the maximum load current plus half the ripple current to prevent core saturation. thus, a 720ma rated inductor should be enough for most applications (600ma + 120ma). for better efficiency, choose a low dc-resis- tance inductor. inductor core selection different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy mate- rials are small and don? radiate much energy, but gener- ally cost more than powdered iron core inductors with similar electrical characteristics. the choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/emi requirements than on what the ltc3406 -1.2 requires to operate. table 1 shows some typical surface mount inductors that work well in ltc3406 -1.2 applications. table 1. representative surface mount inductors part value dcr max dc size number ( h) ( ? max) current (a) w l h (mm 3 ) sumida 1.5 0.043 1.55 3.8 3.8 1.8 cdrh3d16 2.2 0.075 1.20 3.3 0.110 1.10 4.7 0.162 0.90 sumida 2.2 0.116 0.950 3.5 4.3 0.8 cmd4d06 3.3 0.174 0.770 4.7 0.216 0.750 panasonic 3.3 0.17 1.00 4.5 5.4 1.2 elt5kt 4.7 0.20 0.95 murata 1.0 0.060 1.00 2.5 3.2 2.0 lqh3c 2.2 0.097 0.79 4.7 0.150 0.65 c in and c out selection in continuous mode, the source current of the top mosfet is a square wave of duty cycle v out /v in . to prevent large voltage transients, a low esr input capacitor sized for the maximum rms current must be used. the maximum rms capacitor current is given by: c required i i vvv v in rms omax out in out in ? ? () [] 12 / this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is com- monly used for design because even significant deviations do not offer much relief. note that the capacitor manufacturer? ripple current ratings are often based on 2000 hours of life. this makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. always consult the manufac- turer if there is any question. the selection of c out is driven by the required effective series resistance (esr).
8 ltc3406-1.2 340612fa typically, once the esr requirement for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement. the output ripple ? v out is deter- mined by: ??? + ? ? ? ? ? ? v i esr fc out l out 1 8 where f = operating frequency, c out = output capacitance and ? i l = ripple current in the inductor. for a fixed output voltage, the output ripple is highest at maximum input voltage since ? i l increases with input voltage. aluminum electrolytic and dry tantalum capacitors are both available in surface mount configurations. in the case of tantalum, it is critical that the capacitors are surge tested for use in switching power supplies. an excellent choice is the avx tps series of surface mount tantalum. these are specially constructed and tested for low esr so they give the lowest esr for a given volume. other capacitor types include sanyo poscap, kemet t510 and t495 series, and sprague 593d and 595d series. consult the manufacturer for other specific recommendations. using ceramic input and output capacitors higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. because the ltc3406- 1.2? control loop does not depend on the output capacitor? esr for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. however, care must be taken when ceramic capacitors are used at the input and the output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in , large enough to damage the part. applicatio s i for atio wu uu when choosing the input and output ceramic capacitors, choose the x5r or x7r dielectric formulations. these dielectrics have the best temperature and voltage charac- teristics of all the ceramics for a given value and size. efficiency considerations the efficiency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. efficiency can be expressed as: efficiency = 100% ?(l1 + l2 + l3 + ...) where l1, l2, etc. are the individual losses as a percentage of input power. although all dissipative elements in the circuit produce losses, two main sources usually account for most of the losses in ltc3406-1.2 circuits: v in quiescent current and i 2 r losses. the v in quiescent current loss dominates the efficiency loss at very low load currents whereas the i 2 r loss dominates the efficiency loss at medium to high load currents. in a typical efficiency plot, the efficiency curve at very low load currents can be misleading since the actual power lost is of no consequence as illustrated in figure 2. figure 2. power loss vs load current load current (ma) power loss (w) 0.1 10 100 1000 340612 f02 1 1 0.1 0.01 0.001 0.0001 0.00001 v in = 2.7v v in = 3.6v v in = 4.2v
9 ltc3406-1.2 340612fa applicatio s i for atio wu uu 1. the v in quiescent current is due to two components: the dc bias current as given in the electrical character- istics and the internal main switch and synchronous switch gate charge currents. the gate charge current results from switching the gate capacitance of the internal power mosfet switches. each time the gate is switched from high to low to high again, a packet of charge, dq, moves from v in to ground. the resulting dq/dt is the current out of v in that is typically larger than the dc bias current. in continuous mode, i gatechg = f(q t + q b ) where q t and q b are the gate charges of the internal top and bottom switches. both the dc bias and gate charge losses are proportional to v in and thus their effects will be more pronounced at higher supply voltages. 2. i 2 r losses are calculated from the resistances of the internal switches, r sw , and external inductor r l . in continuous mode, the average output current flowing through inductor l is ?hopped?between the main switch and the synchronous switch. thus, the series resistance looking into the sw pin is a function of both top and bottom mosfet r ds(on) and the duty cycle (dc) as follows: r sw = (r ds(on)top )(dc) + (r ds(on)bot )(1 ?dc) (2) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance charateristics curves. thus, to obtain i 2 r losses, simply add r sw to r l and multiply the result by the square of the average output current. other losses including c in and c out esr dissipative losses and inductor core losses generally account for less than 2% total additional loss. thermal considerations in most applications the ltc3406 -1.2 does not dissipate much heat due to its high efficiency. but, in applications where the ltc3406 -1.2 is running at high ambient tem- perature with low supply voltage, the heat dissipated may exceed the maximum junction temperature of the part. if the junction temperature reaches approximately 150 c, both power switches will be turned off and the sw node will become high impedance. to avoid the ltc3406-1.2 from exceeding the maximum junction temperature, the user will need to do some thermal analysis. the goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. the tempera- ture rise is given by: t r = (p d )( ja ) where p d is the power dissipated by the regulator and ja is the thermal resistance from the junction of the die to the ambient temperature. the junction temperature, t j , is given by: t j = t a + t r where t a is the ambient temperature. as an example, consider the ltc3406-1.2 with an input voltage of 2.7v, a load current of 600ma and an ambient temperature of 70 c. from the typical performance graph of switch resistance, the r ds(on) at 70 c is approximately 0.52 ? for the p-channel switch and 0.42 ? for the n-channel switch. using equation (2) to find the series resistance looking into the sw pin gives: r sw = 0.52 ? (0.44) + 0.42 ? (0.56) = 0.46 ? therefore, power dissipated by the part is: p d = i load 2 ?r sw = 165.6mw for the sot-23 package, the ja is 250 c/ w. thus, the junction temperature of the regulator is: t j = 70 c + (0.1656)(250) = 111.4 c which is below the maximum junction temperature of 125 c. note that at higher supply voltages, the junction tempera- ture is lower due to reduced switch resistance (r sw ). checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to ( ? i load ?esr), where esr is the effective series resistance of c out . ? i load also begins to charge or discharge c out , which generates a feedback error signal.
10 ltc3406-1.2 340612fa applicatio s i for atio wu uu the regulator loop then acts to return v out to its steady- state value. during this recovery time v out can be moni- tored for overshoot or ringing that would indicate a stability problem. for a detailed explanation of switching control loop theory, see application note 76. a second, more severe transient is caused by switching in loads with large (>1 f) supply bypass capacitors. the discharged bypass capacitors are effectively put in parallel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. the only solution is to limit the rise time of the switch drive so that the load rise time is limited to approximately (25 ?c load ). thus, a 10 f capacitor charging to 3.3v would require a 250 s rise time, limiting the charging current to about 130ma. pc board layout checklist when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc3406-1.2. these items are also illustrated graphically in figures 3 and 4. check the following in your layout: 1. the power traces, consisting of the gnd trace, the sw trace and the v in trace should be kept short, direct and wide. 2. does the (+) plate of c in connect to v in as closely as possible? this capacitor provides the ac current to the internal power mosfets. 3. keep the (? plates of c in and c out as close as possible. design example as a design example, assume the ltc3406-1.2 is used in a single lithium-ion battery-powered cellular phone application. the v in will be operating from a maximum of 4.2v down to about 2.7v. the load current requirement is a maximum of 0.6a but most of the time it will be in standby mode, requiring only 2ma. efficiency at both low and high load currents is important. with this informa- tion we can calculate l using equation (1), l fi v v v lin = () ? () ? ? ? ? ? ? ? 1 12 1 12 . . (3) substituting v in = 4.2v, ? i l = 240ma and f = 1.5mhz in equation (3) gives: l v mhz ma v v h = ? ? ? ? ? ? ? = 12 1 5 240 1 12 42 238 . .( ) . . . a 2.2 h inductor works well for this application. for best efficiency choose a 720ma or greater inductor with less than 0.2 ? series resistance. c in will require an rms current rating of at least 0.3a ? i load(max) /2 at temperature and c out will require an esr of less than 0.25 ? . in most cases, a ceramic capacitor will satisfy this requirement. run ltc3406-1.2 gnd sw l1 bold lines indicate high current paths v in v out 340612 f03 4 5 1 3 + 2 v out v in c in c out figure 3. ltc3406-1.2 layout diagram ltc3406-1.2 gnd 340612 f04 pin 1 v out v in sw via to v in via to v out c out c in l1 figure 4. ltc3406-1.2 suggested layout
11 ltc3406-1.2 340612fa u package descriptio s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635) information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 1.50 ?1.75 (note 4) 2.80 bsc 0.30 ?0.45 typ 5 plcs (note 3) datum ? 0.09 ?0.20 (note 3) s5 tsot-23 0302 pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ?0.90 1.00 max 0.01 ?0.10 0.20 bsc 0.30 ?0.50 ref note: 1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref typical applicatio s u single li-ion 1.2v/600ma regulator for lowest profile, 1mm high v in c in ** 4.7 f cer v in 2.7v to 4.2v ltc3406-1.2 run 3 2.2 h ? 340612 ta02 5 4 1 2 sw v out gnd c out1 * 10 f cer v out 1.2v * ** ? murata grm219r60ji06ke19b avx06036d475mat fdk mipw3226d2r2m load (ma) 70 efficiency (%) 80 90 100 0.1 10 100 1000 340612 ta03 0 10 60 1 50 40 20 30 v in = 2.7v v in = 3.6v v in = 4.2v i l 500ma/div i load 500ma/div v out 100mv/div ac coupled 20 s/div v in = 3.6v i load = 20ma to 600ma 340612 ta04 ltc3406-1.2 efficiency load step
12 ltc3406-1.2 340612fa related parts part number description comments lt1616 500ma (i out ), 1.4mhz, high efficiency step-down 90% efficiency, v in = 3.6v to 25v, v out = 1.25v, i q = 1.9ma, dc/dc converter i sd = <1 a, thinsot package lt1676 450ma (i out ), 100khz, high efficiency step-down 90% efficiency, v in = 7.4v to 60v, v out = 1.24v, i q = 3.2ma, dc/dc converter i sd = 2.5 a, s8 package ltc1701/lt1701b 750ma (i out ), 1mhz, high efficiency step-down 90% efficiency, v in = 2.5v to 5v, v out = 1.25v, i q = 135 a, dc/dc converter i sd = <1 a, thinsot package lt1776 500ma (i out ), 200khz, high efficiency step-down 90% efficiency, v in = 7.4v to 40v, v out = 1.24v, i q = 3.2ma, dc/dc converter i sd = 30 a, n8, s8 packages ltc1877 600ma (i out ), 550khz, synchronous step-down 95% efficiency, v in = 2.7v to 10v, v out = 0.8v, i q = 10 a, dc/dc converter i sd = <1 a, ms8 package ltc1878 600ma (i out ), 550khz, synchronous step-down 95% efficiency, v in = 2.7v to 6v, v out = 0.8v, i q = 10 a, dc/dc converter i sd = <1 a, ms8 package ltc1879 1.2a (i out ), 550khz, synchronous step-down 95% efficiency, v in = 2.7v to 10v, v out = 0.8v, i q = 15 a, dc/dc converter i sd = <1 a, tssop-16 package ltc3403 600ma (i out ), 1.5mhz, synchronous step-down 96% efficiency, v in = 2.5v to 5.5v, v out = dynamically adjustable, dc/dc converter with bypass transistor i q = 20 a, i sd = <1 a, dfn package ltc3404 600ma (i out ), 1.4mhz, synchronous step-down 95% efficiency, v in = 2.7v to 6v, v out = 0.8v, i q = 10 a, dc/dc converter i sd = <1 a, ms8 package ltc3405/ltc3405a 300ma (i out ), 1.5mhz, synchronous step-down 96% efficiency, v in = 2.5v to 5.5v, v out = 0.8v, i q = 20 a, dc/dc converter i sd = <1 a, thinsot package ltc3406 600ma (i out ), 1.5mhz, synchronous step-down 96% efficiency, v in = 2.5v to 5.5v, v out = 0.6v, i q = 20 a, dc/dc converter i sd = <1 a, thinsot package ltc3411 1.25a (i out ), 4mhz, synchronous step-down 95% efficiency, v in = 2.5v to 5.5v, v out = 0.8v, i q = 60 a, dc/dc converter i sd = <1 a, ms package ltc3412 2.5a (i out ), 4mhz, synchronous step-down 95% efficiency, v in = 2.5v to 5.5v, v out = 0.8v, i q = 60 a, dc/dc converter i sd = <1 a, tssop-16e package ltc3440 600ma (i out ), 2mhz, synchronous buck-boost 95% efficiency, v in = 2.5v to 5.5v, v out = 2.5v, i q = 25 a, dc/dc converter i sd = <1 a, ms package linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com lt/lt 0805 rev a ? printed in usa ? linear technology corporation 2005

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